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Specs and manuals
Features & Benefits: * Enables 80SJNB - the Advanced Jitter, Noise, and BER Analysis Software * Provides Trigger on Repetitive Patterns from 2 to 223 Bits Long * Provides Buffered Clock Output for Input to a Phase Reference Module or other Devices * Accepts Clock from Clock Recovery Circuits (CR) in the 80A05 and 80A07 Electrical Clock Recovery Modules, and in the Optical Modules * Optional SlotSaver Adapter Provides Power and Control of the PatternSync Trigger Modules, External to the Mainframe, Saving Space for Additional Channels Applications: * When Used in Combination with 80SJNB: Characterizing Jitter, Noise, and BER Performance of High Speed Serial Designs from 1 Gb/s to 60 Gb/s Data Rates * Design Validation and Testing of Next Generation High-speed Serial Data Computer and Communications Components and Systems * When Used in Combination with 80SJNB: Jitter, Noise, and BER Analysis of Multi-gigabit Standards such as Fibre Channel, OIF CEI, XFP, UXPi, SATA, PCI, Physical Layer, XAUI, Gigabit Ethernet, Rapid I/O, InfiniBand, and Other Electrical or Optical Circuits * Enables Capture of Bits in a Repetitive Pattern for Bit Analysis When Only a Clock is Available for Triggering * Enables FrameScan of Repetitive Patterns When Only aClock Signal is Available for Triggering
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