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The Gen2 Teledyne LeCroy Multi-lead Probe allows developers using an embedded PCI Express bus in their PCB designs to tap into the signal traces directly and capture bus traffic for protocol analysis and debugging.
The probe allows for individual connection to each separate transmit-pair and receive pair of each serial lane, allowing flexibility to connect to any accessible points on the surface of the PCB. Each connection uses a high-impedance electrical probe to minimize perturbation of the PCI Express bus signals, while providing reliable capture
of all PCI Express traffic.
The probe will connect to a Teledyne LeCroy Summit T24, T28, T3-8 or T3-16 Protocol Analyzer via a Multi-lead Probe Pod. Support is provided for PCI Expressdesigns including 2.5 GT/s (PCIe? 1.0a) and 5.0 GT/s (PCIe 2.0), at lane widths from x1 to x16. Each pod supports up to four lanes (eight pairs); x8 support can be achieved by using two pods; and x16 support can be achieved using four pods with the Summit T3-16 Analyzer. Each individual lane connection is made by using two 30 cm (12%22) extender coax cables connecting into a 17 cm (6.75%22) flex-tip connector which is attached to an individual transmit-pair or receive-pair on the surface of the PCB.